Version 30 (modified by Tim Harvey, 6 years ago) (diff)

added details about cavium thunder mdio driver

Gateworks Newport Family Support

Getting Started

Newport Software


User Manuals

Wireless / WiFi Radios

Cellular Modems


3D Model

The Gateworks Newport product family utilizes the Cavium ARM ThunderX CN80xx / CN81xx SoC (System On Chip) offering a large variety of peripherals with a focus on Networking, and Security. See ​here for a product comparison matrix.


Please note: This is a subset of information for Newport, however, please visit our Main Wiki for all other information


Peripheral Support

Performance / Processor / Memory / Power / Thermal

Other Info

User Manual

Processor Reference Manual / Datasheet / Errata

The ​Cavium Website contains details about the OCTEON TX Dual and Quad core 64bit ARM based SoC's.

Additional references:

Newport Ethernet

GW6300: Linux eth0 and U-Boot vnic0 correspond to the SGMII PHY port (J20 RJ45 inside port closest to USB port) and Linux eth1 and U-Boot vnic1 correspond to the RGMII PHY port (J19 RJ45 nearest panel mount LED).

Newport Board Support Package (BSP)

Gateworks provides a Board Support Package for Newport which provides source code and an easy mechanism to build:

  • Gateworks Newport Linux Kernel
  • Gateworks Newport Boot Firmware

BSP Source Code

Newport Source code for the firmware, bootloader and kernel are hosted at GitHub. We highly recommend you create a GitHub account and 'Watch' these repositories to keep abreast of important feature additions, bugfixes, and firmware-releases. You can configure your GitHub account to e-mail you when changes are made to repositories here.

The following GitHub repos are used for Newport:

Pre-built Firmware Images

The images-newport GitHub repository hosts various pre-built firmware images used for Newport:

Building BSP from source

The Gateworks Newport Board Support Package uses the Google repo tool to manage multiple code repositories.

The following pre-requisites are needed to build the Newport BSP:

  • Linux Development host (Ubuntu 16.04 is used by Gateworks and tested)
  • Python 2.x (required by the 'repo' tool)
  • Git (used for source code repositories)

To obtain the code:

  1. Get repo tool (download latest version of tool and put it in your path)
    mkdir $HOME/.bin/
    echo "PATH=\$PATH:$HOME/.bin/repo" >> $HOME/.profile
    curl > $HOME/.bin/repo
    chmod a+x $HOME/.bin/repo
  2. Initialize repo (fetch the repo manifest)
    mkdir $HOME/newport
    cd $HOME/newport
    repo init -u
  3. Sync repositories (repeat this when you want to fetch the latest code updates)
    repo sync
    • This will fetch/update the source repos described above. The first time it can take several minutes depending on your Internet connection and will take approximately ~2.5GB of disk space
  4. Setup build environment (repeat this each time you open shell)
    source newport/setup-environment
  5. Build 'Boot Firmware' (takes about 2 mins on a modern development system)
    make -j8 firmware # build boot firmware using 8 sub-processes
    • additional targets you may want to make include 'linux' to build the Linux kernel

The resulting firmware-newport.img can be installed to boot media (see below)

Building or modifying the Linux Kernel

The Gateworks Newport BSP creates an environment for building the Linux kernel. Here are some additional instructions for common actions:

  • Modify Kernel configuration (enabling modules etc):
    cd linux
    make newport_defconfig # start with the Newport kernel configuration
    make menuconfig # modify as desired
    make # build Image and modules
  • Build kernel tarball:
    cd linux
    make # build Image and modules
    mkdir -p install/boot # create install and install/boot directories
    cp arch/arm64/boot/Image install/boot # copy kernel Image
    make INSTALL_MOD_PATH=install modules_install # install modules
    tar -cvJf /tftpboot/newport/linux-newport.tar.xz --numeric-owner -C install . # create tarball
    • You can install this kernel on a running system via cd /; tar xvf linux-newport.tar.xz

Firmware Versioning

You can determine the firmware version of various portions of the firmware by looking for banners on the serial console. For example:

Gateworks Newport SPL (ea21abc Tue Dec 12 23:42:48 UTC 2017)

GSC     : v49 0x832c WDT:disabled board temp:61C
RTC     : 0
Model   : GW6304-B
NOTICE:  BL1: v1.3(release):OCTEONTX_SDK_6_2_0_build_26
NOTICE:  BL1: Built : 15:30:07, Dec  4 2017
U-Boot 2017.09-rc1-00023-g1fd1415 (Dec 12 2017 - 15:42:30 -0800) for Cavium OcteonTX CN81XX ARM V8 Core
[    0.000000] Linux version 4.14.4-00005-g9e5958b (tharvey@tharvey) (gcc version 5.3.0 (Cavium Inc. Version 0.99 build 440)) #141 SMP PREEMPT Fri Dec 15 10:18:19 PST 2017
Ubuntu 16.04 LTS xenial-newport ttyAMA0
  • The above output shows you:
    • Secondary Program Loader (SPL) is 'ea21abc' built on Tue Dec 12 23:42:48 2017. The git sha of 'ea21abc'.
    • GSC v49 0x832c
    • ATF (ARM Trusted Firmware) is v1.3 built on Dec 4 2017.
    • U-Boot is '2017.09-rc1-00023-g1fd1415' built on Dec 12 2017.
    • Linux version 4.14.4-00005-g9e5958b built on Fri Dec 15 10:18:19 PST 2017
    • Ubuntu 16.04 (aka xenial) OS (use dpkg -l | grep "^ii" to see what packages and versions are installed

Updating Firmware

This section provides instructions for updating both GSC firmware as well as boot device firmware.

There are two methods for updating firmware:

  • on a live board using Serial Console and Ethernet (Note that currently the eMMC FLASH can only be updated on a live board booted from either eMMC or microSD)
  • on removable storage (ie recovery microSD)
  • using a GW16099 JTAG dongle (see below) (Note that currently only the GSC firmware can be updated via JTAG)

The various items that can be updated:

  • GSC Firmware - currently only JTAG updates are supported for Newport - see below
  • Boot Firmware (Everything up to and including the Bootloader) - currently must be updated from U-Boot or Linux on a live system - see below
  • Root Filesystem (Operating System) - currently must be updated from U-Boot or Linux on a live system - see below

Update Firmware via Serial Console and Ethernet

The quickest and easiest way to update your firmware is via Serial Console and Ethernet. You can do this either in the U-Boot bootloader (recommended) or within a Linux OS. If your primary boot device is corrupt, then you can boot via an alternate boot device (ie microSD).

If using U-Boot (recommended) you need to setup a TFTP server to host the files for transfer. Alternatively you could load firmware files from removable storage (microSD, mSATA, or USB for example) however the transfer rate is typically very slow compared to Gigabit Ethernet. For details on setting up a TFTP server see here.

The following instructions assume your board target IP address is and you have a TFTP server at Adjust environment according to your network via 'setenv ipaddr <ipaddr>' and 'setenv serverip <serverip>'.

Note that if booted from the eMMC (primary device) U-Boot mmc dev 0 is eMMC and mmc dev 1 is microSD however if you booted from the microSD (secondary device) then U-Boot mmc dev 0 is microSD and mmc dev 1 is eMMC. Be sure to use mmc list to determine which device you should set via the mmc dev command.

To update just the 'firmware' (everything up to and including the Bootloader) (firmware image):

mmc dev 0 # use 'mmc list' to show which device is which and select eMMC
tftpboot ${loadaddr} firmware-newport.img && mmc write ${loadaddr} 0 8000

To update the 'boot firmware' as well as the root filesystem download the latest xenial-newport.img.gz from the latest release and flash with:

mmc list # see which device is emmc vs sd
setenv dev 0 # use device of emmc assuming booted from emmc
# using tftp server
tftpboot ${loadaddr} xenial-newport.img.gz && gzwrite mmc ${dev} ${loadaddr} ${filesize}
  • after booting to Linux you will want to run resize2fs /dev/mmcblk0p2 to resize the partition to expand to the available space. This is because xenial-newport.img.gz is a compressed disk image created with a minimal root filesystem to keep flashing time down to a minimum for fast updates.

Creating a microSD recovery image

If your primary boot won't boot for some reason (ie, you corrupted it during development) you can boot from a microSD (see here).

To create a bootable microSD meant for recovery purposes only needing the Bootloader you can use firmware-newport.img:

  • On a Linux host:
    DEVICE=/dev/sdc # set to the microSD on your host
    sudo dd if=firmware-newport.img of=$DEVICE
    • Be careful to set the DEVICE above to the device the microSD appears as on your Linux host - you do not want to overwrite part of your hosts filesystem
  • On a Newport board booted from eMMC:
    mmc list # if booted from eMMC you should see microSD as dev 1
    mmc dev 1 # select microSD
    tftpboot ${loadaddr} firmware-newport.img && mmc write ${loadaddr} 0 8000

To create a bootable microSD with the Gateworks Ubuntu image (takes longer):

  • On a Linux host:
    DEVICE=/dev/sdc # set to the microSD on your host
    zcat xenial-newport.img.gz | sudo dd of=$DEVICE
    # re-partition with a 2.5MB DOS partition (required by BDK) and a Linux partition at 16MB
    printf "3072,8191,1,,\n32768,,L,,\n" | sudo sfdisk -uS $DEVICE
    • we re-partition so that the full size of your microSD is available as the firmware image has partitions setup for a 8GiB device. Even though the partition table grows to the size of your device you still need to run resize2fs /dev/mmcblk0p2 after bootup to grow the partition to fit the space in the table.
    • while you could use U-Boot on a running board to program a microSD you would not be able to adjust it's partition table easily to take advantage of a larger disk.

JTAG Programming

The Gateworks JTAG adapter (GW16099) is available in the Newport Dev Kit as well as on the Gateworks web store here

All Newport boards have a 10-pin JTAG header which provides:

  • JTAG Programming for embedded FLASH - see here for instructions
  • Serial Console access via UART0 (/dev/ttyAMA0)

Please Note:

  • Linux software is supported for programming Newport (jtag_usbv4 required). Windows is not supported at this time. (serial console through Windows does work).
  • JTAG Programming of eMMC has not been made available yet. You must boot from a microSD image to program or re-program eMMC flash
  • JTAG Programming of the GSC firmware is supported by the most recent version of jtag_usbv4 here

Update GSC Firmware via JTAG

To update the GSC firmware via JTAG download the jtag_usbv4 application on a Linux x86 host from here and execute as follows:

./jtag_usbv4 -m gsc_630x_v49.txt

Note that the ftdi_sio kernel module must not be loaded (sudo rmmod ftdi_sio) and you may need to run this command as root by pre-pending a sudo depending on the configuration of your linux host.

For more details please see:

Boot Firmware (Up to and including the Bootloader)

The 'Boot Firmware' for Newport is defined as the combination of the First level 'boot stub' and the additional firmware stages through the bootloader. This can be broken down into the following stages:

  • Boot ROM (internal on CN80XX/CN81XX SoC): fetch first level boot stub (192KB limit) from boot device (MMC or SPI FLASH)
  • SPL (Secondary Program Loader)
  • Bootloader (U-Boot)

For a Secondary Program Loader, or SPL, Gateworks currently uses the Cavium Board Development Kit (BDK) provided by their OCTEON-TX Software Development Kit (SDK). In this current implementation the Boot ROM loads and executes the BDK, the BDK loads and executes the ARM Trusted Firmware (ATF) and the ATF loads and executes the U-Boot bootloader in multiple stages as such:

  • First level: Bootstub (firmware/bdk)
  • Second level: ATF (firmware/atf)
  • Third level: U-Boot (bootloader/u-boot)

Gateworks provides a pre-built Boot Firmware (firmware-newport.img) ready to flash onto boot devices as well as source for building and/or modifying the boot firmware yourself.

Boot ROM

The OCTEON-TX Boot ROM code loads an image from the primary boot device which can be either MMC or SPI FLASH. For a description of available boot devices see below.

The Boot ROM uses information from 0x10000 to 0x7FFFF on the primary boot device. The first 64KB is not used by the Boot ROM and is used as a standard partition table for backwards compatibility with standard Operating Systems and from 0x80000 (512KB) onward is used by the Operating System.

Boot Device

Some boards have multiple boot device and may allow selection of which one is the 'primary boot device':

board Primary Boot Device Alternate Boot Device
GW630x on board eMMC microSD

To boot from the alternate boot device manually you can press-and-release the user pushbutton 5 times in a row and the board will power cycle primary power (the 3.3V LED will go off, then on again) and the board will boot from the alternate boot device.

Boards with an Alternate boot device also have a boot watchdog such that if the current boot device fails to boot within 30 seconds, the board will power cycle primary power and attempt boot from the other boot device.

The bootloader also has a notion of boot device, either the built in eMMC or an external microSD. This is controlled through the UBoot variable 'dev'. The dev variable is purely for the bootloader, and does not signify what device to boot the kernel/rootfs from.

Note if booting with the onboard eMMC as the primary boot device, “0/mmcblk0” is the U-Boot/Linux? device node for eMMC and “1/mmcblk1” is the U-Boot/Linux? device node for microSD. When booting from the alternate device (microSD) this is swapped.

Booting to a kernel/rootfs on the microSD

This assumes the bootloader will remain on the eMMC, but then we switch to the microSD for the kernel/rootfs.

Run the following commands in the uboot bootloader command prompt on the Newport SBC serial console:

#This tells the board to always get the bootloader from emmc, which is ok.

setenv dev 0

#now we are going to create a NEW script called boot_sd for booting from the microSD: #note the ext4load command grabs from 1:2, which means dev 1, which will be the microSD as long as you set #dev to 0 above (meaning dev 0 will be emmc, which will hold the bootloader, and then 1 would be the microSD)

setenv boot_sd  "ext4load mmc 1:2 ${kernel_addr} boot/${kernel} && setenv root '/dev/mmcblk0p2 rw rootwait' && run setargs && booti ${kernel_addr} - ${fdtcontroladdr}"

#now save everything


#now boot to microSD

run boot_sd

If you want to then start doing this automatically everytime, you would look at the variable called boot_cmd. It currently uses the built in script we have to boot from mmc (which means emmc)

GW6304-B> print bootcmd
bootcmd=run boot_mmc

#if you want to modify this to boot from your new script:

setenv bootcmd 'run boot_sd'

U-Boot Bootloader

Gateworks supports the U-Boot Bootloader for the Newport product family. We provide pre-built firmware images (see [#firmware above) as well as source for building and/or modifying it yourself.

One of the primary features of the Bootloader is to provide access to the hwconfig environment variable that the firmware uses for initial board configuration on power-up.


The U-Boot Bootloader by convention provides a hwconfig environment variable which is used by the boot firmware (before U-Boot is loaded and executed) to configure board options at power-up. These options can include things such as:

  • miniPCIe socket functions (ie PCIe vs mSATA vs USB3.0)
  • serial configuration (ie RS232 vs RS485)

hwconfig: miniPCIe Socket Configuration

Newport board model socket options:

  • GW630x:
    • J9: PCIe
    • J10: PCIe or SATA
    • J11: PCIe or USB3.0

Note that USB2.0 is routed to all three miniPCIe sockets always but as USB3.0 shares signals with PCIe you must choose between PCIe and USB3 on sockets that support USB3.

You can get/set the hwconfig variable within the U-Boot bootloader but you must reboot the board for it to take effect as the variable is acted upon in the Secondary Program Loader (SPL).


  • GW630x:
    • J10 PCIe, J11 PCIe (default)
      setenv hwconfig 'j10:pcie;j11:pcie'; saveenv
    • J10 mSATA, J11 USB3.0
      setenv hwconfig 'j10:sata;j11:usb3'; saveenv
    • J9/J10 disabled, J11 PCIe
      setenv hwconfig 'j9:disabled;j10:disabled;j11:pcie'; saveenv

Note that hwconfig is also used for serial configuration so care should be taken to preserve that configuration if used

hwconfig: serial Configuration

Many boards in the Newport product family provide a 5-pin off-board serial connector that provides the following options:

  • 1x RS485 FD (UART2)
  • 1x RS485 HD (UART2)
  • 1x RS232 w/ hardware flow control (UART2)
  • 2x RS232 w/o hardware flow control (UART2/UART3)

By default 2x RS232 with no flow control is enabled. To configure a different option use the hwconfig U-Boot env variable. The mode property of the serial option defines the initial configuration of the serial port(s). If RS485 is selected by the mode property the term property will select whether or not on-board termination is enabled.

The mode property can have the following values:

  • rs232 - 2x RS232 (UART2/UART3) without hardware flow control (default if not specified)
  • rs232_dtr - RS232 (UART2) with hardware flow control
  • rs485_hd - RS485 half-duplex
  • rs485_fd - RS485 full-duplex


  • enable RS485 half duplex no on-board termination
    setenv hwconfig "serial:mode=rs485_hd,term=no"; saveenv
  • enable RS485 full duplex with on-board termination
    setenv hwconfig "serial:mode=rs485_fd,term=yes"; saveenv
  • enable RS232 with hardware flow-control:
    setenv hwconfig "serial:mode=rs232_dtr"; saveenv

Note that hwconfig is also used for serial configuration so care should be taken to preserve that configuration if used

Board Support Packages (BSP) Software

Choosing a BSP

Gateworks offers several Board Support Packages for the Newport Product family. Which one we recommend depends a bit upon what your goal is and what your experience level is.

  • Ubuntu
    • Recommended for developers trying to heavily leverage opensource software packages or libraries that are not supported by the other BSP's. This is the most user-friendly for developers new to Embedded Linux but will not produce a very trimmed down filesystem image.
    • Uses mainline kernel.
    • Supports all Newport features.
    • Documentation provided to use Ubuntu pre-built packages and debootstrap to create a root filesystem in minutes
    • Native compilation: no SDK or cross-toolchain needed
  • OpenWrt - Coming Soon for Newport - intended for wireless routers and access points (low flash and memory footprint)
    • Recommended for networking users wanting to create a headless router, VPN, basestation, wireless access point and more. Produces by far the smallest storage and memory footprint but users new to Embedded Linux will have a bit of a learning curve
    • Fairly up-to-date and/or vanilla kernel support
    • Latest wireless drivers (via linux-backports)
    • Custom application config and init system (nice for small footprint, but can make adding support for additional packages more work)
    • Wide variety of packages (including a fairly nice web-admin)
    • Console-based build system (expect 60mins to build BSP for a specific board family)
    • Downloadable SDK and Toolchain available to build apps on a development host without building the entire BSP
    • Pre-built images available

The following table may also help in choosing what BSP is right for you:

Feature OpenWrt Ubuntu Notes
Pre-built images Yes Yes
Storage Needed <256MB 2GB or larger
Build-System Yes No 1
Toolchain SDK Native 2
Web-Admin Yes No 3
  1. The OpenWrt BSP contain an integrated build-system. Ubuntu has step-by-step instructions on how to build an bootable system in 10 or so steps.
  2. The OpenWrt BSP provides a downloadable SDK for cross-compiling applications on a development hosts. For Ubuntu native development and compilation is supported.
  3. The OpenWrt BSP is designed to be a wireless router and has an integrated web-admin for configuration and control.


Gateworks offers a pre-built Ubuntu distribution using the latest Gateworks kernel as well as instructions on how to build your own Ubuntu based distribution.

OpenWrt Board Support Package (BSP)

Coming Soon

The Newport OpenWrt BSP provides the following:

  • Linux 4.x kernel (fairly vanilla)
  • latest wireless drivers (compat-wireless)
  • tuned for minimal FLASH/memory footprint (entire distro fits on embedded 16MB FLASH)

Third Party Linux Distros

While Gateworks cannot fully support all Linux distros, it is relatively simple to overlay a Gateworks Newport kernel onto any non-Gateworks third party Linux distro rootfs image.

The following links will describe what is needed:

  1. Linux kernel supporting Newport: linux/kernel
  2. Root Filesystem: see below
  3. Bootable media: linux/blockdev

Root filesystem Sources

There are several sources of pre-built root filesystems that are compatible with Newport. As Newport uses an ARM 64bit based SoC, you need to use something that is compatible with an ARMv8 instruction set. Many pre-built distributions will reference 'arm64' which means 'ARM 64-bit' which is appropriate for the CN80XX / CN81XX SoC.

Some popular third-party sources:

  • Ubuntu Core - this is a minimal filesystem that you can build off of at runtime by adding packages from various repositories.
  • Linaro - Linaro has several root filesystems including server, nano, developer, core, and ALIP. Each root filesystem will have different things installed for different purposes. Choose carefully which will work for you.


  • some root filesystems may require you to manually add a user before booting (ie Ubuntu Core)
  • the default Newport bootloader expects to find the Image in the /boot directory on the 2nd partition of type ext2/3/4

Mainline Linux Kernel support

Gateworks actively participates in the development of the Linux kernel.

Cavium licenses CPU core IP from ARM and the name they give the CPU core within the OCTEON-TX CN80XX / CN81XX is the Cavium 'ThunderX'. Therefore many of the peripheral drivers within the Linux kernel have 'thunderx' in their name and more often then not the 'OCTEON' name refers to the older OCTEON MIP64 core.

The following table shows what OCTEON-TX CN80XX / CN81XX peripherals support is available in the mainline kernel starting from 4.13:

Feature Support Notes
serial UART (SBSA) Yes SERIAL_AMBA_PL011 drivers/tty/serial/amba-pl011.c
watchdog Watchdog (SBSA) Yes ARM_SBSA_WATCHDOG drivers/watchdog/sbsa_gwdt.c
I2C Yes (4.9+) I2C_THUNDERX drivers/i2c/busses/i2c-{octeon-core,thunderx-pcidrv}.c
Networking BGX (SGMII) Yes (4.2+) THUNDER_NIC_BGX drivers/net/ethernet/cavium/thunder/thunder_bgx.c
Networking RGX (RGMII) Yes (4.9+) THUNDER_NIC_RGX drivers/net/ethernet/cavium/thunder/thunder_xcv.c
Networking MDIO (PHY) Yes (4.6+) MDIO_CAVIUM/MDIO_THUNDER drivers/net/phy/mdio-{cavium,thunder}.c
PCI Yes (4.6+) PCI drivers/pci/host/pci-thunder-{ecam,pem}.c
SPI Yes (4.9+) SPI_THUNDERX drivers/spi/spi-thunderx.c
MMC eMMC / microSD Yes (4.12+) MMC_CAVIUM_THUNDERX drivers/mmc/host/thunderx-mmc.c
HW RNG (Hardware Random Number Generator) Yes (4.9+) HW_RANDOM_CAVIUM drivers/char/hw_random/cavium-rng*.c
HW Compressions offload Yes (4.12+) DEV_CAVIUM_ZIP drivers/crypto/cavium/zip.c
Crypto Yes (4.11+) DEV_CAVIUM_CPT drivers/crypto/cavium
RTC Yes RTC_DRV_DS1672 drivers/rtc/rtc-ds1672.c
LED/GPIO Yes (4.14+) GPIO_THUNDERX drivers/gpio/gpio-thunderx.c

The following kernel configs should be enabled for the OCTEON-TX CN80XX / CN81XX:

  • EDAC_THUNDERX - Error Detection and Correction (works with 'edac-util' app from 'edac-utils' package)
  • GPIO_THUNDERX - General Purpose I/O
  • SPI_THUNDERX - SPI Controller
  • I2C_THUNDERX - I2C Controller
  • THUNDERX_NIC_VF - NIC virtual function
  • THUNDERX_NIC_PF - NIC physical function
  • THUNDERX_NIC_BGX - Network Controller (selects MDIO_CAVIUM/MDIO_THUNDER)
  • MDIO_THUNDER (selected automatically by THUNDERX_NIC*)
  • MDIO_CAVIUM (selected automatically by THUNDERX_NIC*)
  • PCI_HOST_THUNDER_PEM - PCI host controller
  • PCI_HOST_THUNDER_ECAM - Enhanced Configuration Access Mechanism for PCIe memory mapped I/O
  • ARM_SBSA_WATCHDOG - ARMv8 Watchdog
  • CRYPTO_DEV_CAVIUM_ZIP - Hardware Compression / Decompression off-load
  • HW_RANDOM_CAVIUM - Hardware accelerated random number generator

Note that there are many kernel drivers using the name 'Octeon' but they typically refer to a different chipset and the CN80XX / CN81XX have more in common with the Cavium 'ThunderX' architecture as that is the SoC core.

For details on building a Linux kernel see here

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