Changes between Version 15 and Version 16 of SPI


Ignore:
Timestamp:
07/02/2021 11:12:22 PM (3 years ago)
Author:
Cale Collins
Comment:

added spi bus faq

Legend:

Unmodified
Added
Removed
Modified

  • SPI

    v15 v16  
    88 * SS# (Optional Slave Select)
    99
     10== SPI bus FAQ
     11
    1012SPI can be a multi-slave bus if chip selects are used which are asserted by the host controller to enable one device at a time.
     13
     14The clock rate can differ between SPI slave devices as only the one with the asserted (active low) chip-select is active.
     15
     16The bus is capable of clocking up to 50Mhz althought the MCP2515 can only clock up to 10Mhz.
     17
     18The clock rate dictates how long SPI transactions take in real-time, therefore you want to use the highest rate possible to minimize the amount of time a chip is owning the bus.
     19
     20The type of activity being performed with each slave device dictates how often and how long each device is owning the bus.
     21
     22The SPI subsystem has a SPI message queue which is handled as a FIFO. See the Elixir page linked below for more details. 
     23
     24Your CPU frequency, co-processors frequency, and kernel tuning will dictate how often the SPI host is serviced in order to service the queue.  Questions related to SPI host servicing and queuing should be sent to the linux-spi mailing list !linux-spi@vger.kernel.org
     25
    1126
    1227References:
    1328 * http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus
     29 * https://www.kernel.org/doc/html/latest/driver-api/spi.html
     30 * https://elixir.bootlin.com/linux/latest/source/Documentation/spi/spi-summary.rst
    1431
    1532