Changes between Version 16 and Version 17 of SPI


Ignore:
Timestamp:
07/06/2021 07:13:01 PM (3 years ago)
Author:
Cale Collins
Comment:

fixed faq

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  • SPI

    v16 v17  
    1414The clock rate can differ between SPI slave devices as only the one with the asserted (active low) chip-select is active.
    1515
    16 The bus is capable of clocking up to 50Mhz althought the MCP2515 can only clock up to 10Mhz.
     16The SPI bus on Newport is capable of clocking up to 50Mhz, although the MCP2515 can only clock up to 10Mhz.
    1717
    1818The clock rate dictates how long SPI transactions take in real-time, therefore you want to use the highest rate possible to minimize the amount of time a chip is owning the bus.