Changes between Initial Version and Version 1 of venice/npu


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Timestamp:
03/20/2024 07:45:47 PM (20 months ago)
Author:
Ryan Erbstoesser
Comment:

start npu page

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  • venice/npu

    v1 v1  
     1= Neural Processing Unit
     2
     3The Gateworks Venice SBCs that are using the i.MX8M Plus processors have a built in Neural Processing Unit (NPU) for machine learning.
     4 * All GW74xx use the i.MX8M Plus processor
     5 * Any GW71xx, GW72xx and GW73xx using a GW702x SOM module will use the i.MX8M Plus processor
     6
     7The NPU operatines up to 2.25 TOPS.
     8
     9NXP uses the term eIQ, which is 'edge intelligence'. NXP has a eIQ ML software environment for neural networks (NN).
     10
     11With eIQ, there are 4 inference engines – OpenCV, Arm® NN, Arm CMSIS-NN and TensorFlow Lite
     12
     13
     14Some of the default NXP Yocto software has examples in the directory /usr/bin/tensorflow-lite-2.4.0/examples
     15
     16More information can also be found on the eIQ community page:
     17 * eIQ Edge Intelligence Starter PDF: [https://www.nxp.com/docs/en/fact-sheet/EIQ-FS.pdf]
     18 * eIQ Edge Intelligence Community Page: https://community.nxp.com/t5/eIQ-Machine-Learning-Software/bd-p/eiq