Changes between Version 7 and Version 8 of venice/npu
- Timestamp:
- 08/09/2024 07:29:45 PM (8 months ago)
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venice/npu
v7 v8 7 7 The NPU operatines up to 2.25 TOPS. Out of the box, this makes Gateworks boards with NPU capabilities powerful for AI applications on the edge. 8 8 9 [[Image(https://trac.gateworks.com/raw-attachment/wiki/venice/npu/gw74xx_npu_benchmark .png)]]9 [[Image(https://trac.gateworks.com/raw-attachment/wiki/venice/npu/gw74xx_npu_benchmark_new.png)]] 10 10 11 11 The easiest way to get started with the NPU is to use a image from the NXP BSP. This image contains the necessary libraries and kernel to interface the NPU with TensorFlow without much configuration. You can either [[https://www.nxp.com/docs/en/user-guide/IMX_YOCTO_PROJECT_USERS_GUIDE.pdf | follow the guide to build their image]] or [[https://www.nxp.com/design/design-center/software/embedded-software/i-mx-software/embedded-linux-for-i-mx-applications-processors:IMXLINUX | download a pre-built one]] (recommended). … … 184 184 This data is derived from {{{classifications/sec = 1/(image classification time)}}} 185 185 186 [[Image(https://trac.gateworks.com/raw-attachment/wiki/venice/npu/gw74xx_npu_benchmark .png)]]186 [[Image(https://trac.gateworks.com/raw-attachment/wiki/venice/npu/gw74xx_npu_benchmark_new.png)]] 187 187 188 188 === GStreamer Example for Detection